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EVL6566A-75WADP
19 V - 75 W laptop adapter with tracking boost PFC pre-regulator, using the L6563 and the L6566A
Data Brief
Features

Universal input mains range: 90/264Vac Frequency 45 / 65 Hz Output voltage: 19 V@4 A continuous operation Mains harmonics: Acc. to EN61000-3-2 Class-D ST-by mains consumption: Less than 0.25 W @265Vac Overall efficiency: Better than 86% EMI: According to EN55022-Class-B Safety: According to EN60950 Low profile design: 25 mm maximum height PCB single layer: single side, 70 m, CEM-1, 78x174 mm, Mixed PTH/SMT
Description
In this data brief of the EVL6566A-75WADP demo board, the main characteristics and features of a 75 W adapter wide-range input mains, powerfactor-corrected AC-DC adapter using the new L6566A controller and the L6563 dedicated to the PFC stage are described. High efficiency and the very low standby input consumption are highlighted in the following figures and tables. The board is programmed for working at fixed frequency (65 kHz) under nominal condition (19 V at 4 A). On the secondary side the TSM1014 with a precise voltage reference and the optocoupler SFH617A-4 to transfer the error amplifiers information to the primary side have been used.
September 2007
Rev 1
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www.st.com 8
For further information contact your local STMicroelectronics sales office.
Efficiency
EVL6566A-75WADP
1
Efficiency
Table 1 below shows the efficiency with two different input voltages. The table begins with the nominal load at 80 W on the output and it displays the efficiency at every power decrease of 5 W. Table 1. Efficiency measurements
230 V-50 Hz Pin 85.73 80.56 74.91 68.68 62.40 56.96 52.31 47.03 41.01 34.40 29.60 24.70 17.86 11.98 6.64 2.73 Pout 75.05 70.00 65.01 59.97 55.01 50.00 45.02 40.00 35.05 30.00 25.02 20.00 14.94 10.00 5.01 1.99 Eff. 87.5% 86.9% 86.8% 87.3% 88.2% 87.8% 86.1% 85.1% 85.5% 87.2% 84.5% 81.0% 83.7% 83.5% 75.5% 72.9% Pin 87.24 80.73 74.34 68.95 63.80 58.03 51.80 45.45 40.53 35.15 29.00 23.07 18.36 11.88 6.10 2.53 115 V-60 Hz Pout 75.06 70.00 65.01 60.00 55.02 50.04 45.05 40.00 35.05 30.00 25.02 20.00 15.05 10.00 5.05 1.99 Eff. 86.0% 86.7% 87.4% 87.0% 86.2% 86.2% 87.0% 88.0% 86.5% 85.3% 86.3% 86.7% 82.0% 84.2% 82.8% 78.7%
Above the 20 W power output, the efficiency is constant over 85%. Figure 1. Overall efficiency versus output power at nominal mains voltages
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EVL6566A-75WADP
Full load
2
Full load
Figure 2 and Figure 3 below show the drain and gate fly-back waveforms and the relevant switching frequency at full load.
Figure 2.
L6566A fly-back stage waveforms at 115 V-60 Hz full load
Figure 3.
L6566A fly-back stage waveforms at 230 V-50 Hz full load
CH1: drain 6566A CH2: gate 6566A
CH1: drain 6566A CH2: gate 6566A
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Light load condition (fold back frequency)
EVL6566A-75WADP
3
Light load condition (fold back frequency)
To improve the efficiency at light load, a frequency shifting has been implemented on the board. Thus, at decreasing load, the frequency also decreases. Figure 4 and Figure 5 below show the drain and gate fly-back waveforms and the relevant switching frequency with a load of 0.2 A.
Figure 4.
L6566A fly-back stage waveforms at 115 V-60 Hz 0.2 A
Figure 5.
L6566A fly-back stage waveforms at 230 V-50 Hz full load
CH1: drain 6566A CH2: gate 6566A
CH1: drain 6566A CH2: gate 6566A
Table 2 below shows the efficiency when we set the power input with 2.4 or 1.7 W in two different voltage inputs with the fold back network plugged in. Table 2. Standby consumption
Light load condition Vin = 230 V Pin Pout Efficiency 2.40 1.51 62.9% 1.69 1.06 62.7% 2.41 1.70 70.5% Vin = 115 V 1.71 1.14 66.7%
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EVL6566A-75WADP
No-load
4
No-load
Table 3 gives the power consumption of the circuit during no-load operation. Figure 6 and Figure 7 show the main waveforms under this condition. Table 3. No-load consumption
Vin [Vrms] 90 115 230 265 Input power [W] 0.94 0.107 0.202 0.260
Figure 6.
L6566A fly-back stage waveforms at 115 V-60 Hz no-load
Figure 7.
L6566A fly-back stage waveforms at 230 V-50 Hz no-load
CH1: drain 6566A CH2: Vcc 6566A CH3: Vout adapter
CH1: drain 6566A CH2: Vcc 6566A CH3: Vout adapter
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5
C1 2N2 C5 470N - 400V R2 680K R3 2M2 C7 2N2
Figure 8.
1 2 3
C3 470N
C2 2N2
90-264Vac
R4 68K R6 680K R5 2M2 R28 680K C8 1N0 HS3 HEAT-SINK R11 2M2 R8 75K D5 STPS20H100CFP D17 BZV55-B18 R78 2K2 R77 100K R75 1K8 J2 R76 4K7 C17 100N C13 R22 R015 R9 75K R66 3R9 L3 TSL0706 - 1R5-4R3 R14 3R9
~
_
Schematic
C4 470N
R7 3M3
R12 3M3
R15 100K
C9 100N Q2 STP9NK50ZFP D4 1.5KE250A
U1 L6563
1000u - 25V
INV
VCC
2-3 15-16
D7 C12 STPS20H100CFP C16
C15 1u R23 27R R24 100K D8 STTH108A HS1 HEAT-SINK
R17 62K
2
COMP
GD
13
1000u - 25V
1
14
3
MULT
GND
12
100u - 25V
R18 51K
C19 2N2
4
CS
ZCD
11
5
VFF
RUN
10
C21 470N R27 0R33
6
TBO
PWM-STOP
9
7
C24 2N2
R30 22K
PFC-OK
PWM-LATCH
8
R26 0R0 R10 33K
EVL6562A-TM-80W schematic
C25 220p
C26 22N
R34 390K R72 0R0 C32 100N D12 R43 LL4148 4R7 Q5 STP10NK80ZFP U6 L6566A C23 100N R64 150K R37 10K C30 2N2 R46 15R R47 100K C33 47u - 50V D11 STTH102A R35 2R7
R33 0R0
R50 1K0 Q3 BC847C
4
C41 10N R63 100K C40 10N R58 M57703 R59 12K C39 100N Q9 BC857C
R70 18K
1
3
2
+ +
~
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D1 1N4005 L2 SRW25CQ-T05V102 R1 NTC 10R-S236
Schematic
J1 MKDS 1,5/ 3-5,08
F1 FUSE 4A
L1 HF2422-203Y1R0-T01
D2 GBU4J
6 8 3
C6 100u - 450V D3 STTH2L06
5
C14 220N
Q11 BC847C Q10 BC847C
1 2
MKDS 1,5/ 2-5,08
5-6
10-11
19V@4A
8 9
R25 470R
T1 SRW32EC-T01H114
R19 3K0
R62 100K
HS2 HEAT-SINK
1 HV N.C. GND
R42 33K
AC_OK VFF SS OSC MODE/SC ZCD VREF COMP 9 10 11 12
R60 6K8
16 15 14 13
C34 47N D16 LL4148 R67 12K R51 1K0 R52 0R56 R53 0R56 R31 39K
2 3 4 GD VCC VCC_PFC CS DIS 5 6 7 8
C38 220p
R32 15K
R36 1K8
R55 22R R69 1K0 R57 100R
OTP PROT
U3 SFH617A-4 R45 2K2 R74 47K R39 56K
R68 220K U5
1 2
C44 1N
V_REF CC3 4
R54 47K C35 220N R48 4K7 R49 24K R65 22K
VCC CC_OUT CC+ CVGND CV_OUT
TSM1014AIST
8 7 6 5
C36 100N
EVL6566A-75WADP
C43 2N2
EVL6566A-75WADP
Revision history
6
Revision history
Table 4.
Date 28-Sep-2007
Document revision history
Revision 1 Initial release Changes
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EVL6566A-75WADP
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